Real-Time FPGA Demonstrator of ANN-Based Equalization for Optical Communications

Add code
Feb 23, 2024
Jonas Ney, Patrick Matalla, Vincent Lauinger, Laurent Schmalen, Sebastian Randel, Norbert Wehn
Figure 1 for Real-Time FPGA Demonstrator of ANN-Based Equalization for Optical Communications
Figure 2 for Real-Time FPGA Demonstrator of ANN-Based Equalization for Optical Communications

Share this with someone who'll enjoy it:

Twitter IconFacebook IconLinkedin IconWhatsapp IconMessenger Icon

In this work, we present a high-throughput field programmable gate array (FPGA) demonstrator of an artificial neural network (ANN)-based equalizer. The equalization is performed and illustrated in real-time for a 30 GBd, two-level pulse amplitude modulation (PAM2) optical communication system.

* Accepted and to be presented as demonstrator at the IEEE International Conference on Machine Learning for Communication and Networking (ICMLCN) 2024  
View paper onarxiv icon

Share this with someone who'll enjoy it:

Twitter IconFacebook IconLinkedin IconWhatsapp IconMessenger Icon