The Continuous-Time RC-Chain ADC

An amplifier-less continuous-time analog-to-digital converter consisting of only passives, comparators, and inverters is presented. Beyond simplicity, the architecture displays significant robustness properties with respect to component variations and comparator input offsets. We give an analytical design procedure demonstrating how to parameterize the architecture to a range of signal-to-noise and bandwidth requirements and validate the procedure's accuracy with behavioral transient simulations.